Publications
CCF-A
40
papers
CCF-B
24
papers
CCF-C
17
papers
Remark: * indicates student I (co-)supervised.
Remark: = indicates equal contribution.
Remark: ✉ indicates correspondence.
Remark: CCF-A/B/C tags indicate ranked venues in the CCF recommended list.
2026
-
ELSA: An ELastic SNN Inference Architecture for Efficient Neuromorphic Computing CCF-A In Proceedings of the 53rd Annual International Symposium on Computer Architecture (ISCA-26)
-
NasZip: Software and Hardware Co-design to Accelerate Approximate Nearest Neighbor Search with DIMM-based Near-Data Processing CCF-A In Proceedings of the 53rd Annual International Symposium on Computer Architecture (ISCA-26)
-
Seele: A unified acceleration framework for real-time gaussian splatting CCF-A In IEEE / CVF Computer Vision and Pattern Recognition Conference (CVPR-26)
-
Determinism in the Undetermined: Deterministic Output in Charge-Conserving Continuous-Time Neuromorphic Systems with Temporal Stochasticity arXiv:2603.15987
-
Splatonic: Architecture Support for 3D Gaussian Splatting SLAM via Sparse Processing CCF-A In IEEE International Symposium on High-Performance Computer Architecture (HPCA-26)
2025
-
APU: Accelerate Point Cloud Neural Networks via Unified Processing-in-SRAM Architecture CCF-A IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD25)
-
PolymorPIC: Embedding Polymorphic Processing-in-Cache in RISC-V based Processor for Full-stack Efficient AI Inference CCF-A In 58th IEEE/ACM International Symposium on Microarchitecture (MICRO-58)
-
VeriRL: Boosting the LLM-based Verilog Code Generation via Reinforcement Learning CCF-B In The 2025 IEEE/ACM International Conference on Computer-Aided Design (ICCAD’25)
-
MASIM: An Energy-Efficient Multi-Array Scheduler for SIMD Logic-in-Memory Architectures CCF-B In The 2025 IEEE/ACM International Conference on Computer-Aided Design (ICCAD’25)
-
✭Best Student Paper Award Nomination✭ High-Quality Iterative Logic Compiler for In-Memory SIMD Computation with Tight Coupling of Synthesis and Scheduling In 34th International Workshop on Logic & Synthesis (IWLS’25)
-
Finetuned Decision Transformer with Tree Search for Logic Synthesis Optimization In International Symposium of EDA (ISEDA’25)
-
VISTREAM: Improving Computation Efficiency of Visual Perception Streaming via Law-of-Charge-Conservation Inspired Spiking Neural Network CCF-A In IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR’25)
-
StreamGrid: Streaming Point Cloud Analytics via Compulsory Splitting and Deterministic Termination CCF-A In Proceedings of the 30th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS’25)
-
✭Best Paper Nomination✭ PICK: An SRAM-based Processing-in-Memory Accelerator for K-Nearest-Neighbor Search in Point Clouds CCF-A In Proceedings of the 62th ACM/IEEE Design Automation Conference (DAC’25)
-
BiNeuroRAM: Energy-Efficient ReRAM-Based PIM for Accurate Bipolar Spiking Neural Network Acceleration CCF-A In Proceedings of the 62th ACM/IEEE Design Automation Conference (DAC’25)
-
HaVen: Hallucination-Mitigated LLM for Verilog Code Generation Aligned with HDL Engineers CCF-B In Proceedings of Design, Automation and Test in Europe Conference (DATE’25)
2024
-
A Recursive Partition-Based In-Memory SIMD Computation Scheduler for Memory Footprint Minimization CCF-A IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD’24)
-
BKDSNN: Enhancing the Performance of Learning-based Spiking Neural Networks Training with Blurred Knowledge Distillation CCF-B In Proceedings of The 18th European Conference on Computer Vision (ECCV) 2024
-
Obtaining Optimal Spiking Neural Network in Sequence Learning via CRNN-SNN Conversion CCF-C In Proceedings of 33rd International Conference on Artificial Neural Networks (ICANN)
-
SpikeZIP-TF: Conversion is All You Need for Transformer-based SNN CCF-A In Proceedings of Forty-First International conference on Machine Learning (ICML)
-
CLLMs: Consistency Large Language Models CCF-A In Proceedings of Forty-First International conference on Machine Learning (ICML)
-
ERL-LS: Accelerating the Optimization of Logic Synthesis with Evolutionary Reinforcement Learning In Proceedings of International Symposium of Electronic Design Automation (ISEDA)
-
An Efficient Logic Operation Scheduler For Minimizing Memory Footprint Of In-memory SIMD Computation CCF-B In Proceedings of Design, Automation and Test in Europe Conference (DATE)
-
PIMLC: Logic Compiler for Bit-serial Based PIM CCF-B In Proceedings of Design, Automation and Test in Europe Conference (DATE)
2023
-
Monolithic 3D integration of 2D transistors and vertical RRAMs in 1T-4R structure for high-density memory Nature Communications
-
GPT-LS: Generative Pre-Trained Transformer with Off-line Reinforcement Learning for Logic Synthesis CCF-B In Proceedings of 41st IEEE International Conference on Computer Design (ICCD)
-
✭Best Paper Nomination✭ GIM: Versatile GNN Acceleration with Reconfigurable Processing-in-Memory CCF-B In Proceedings of 41st IEEE International Conference on Computer Design (ICCD)
-
HyAcc: A Hybrid CAM-MAC RRAM-based Accelerator for Recommendation Model CCF-B In Proceedings of 41st IEEE International Conference on Computer Design (ICCD)
-
VSPIM: SRAM Processing-in-Memory DNN Acceleration via Vector-Scalar Operations CCF-A IEEE Transactions on Computers (TC)
-
XMG-GPPIC: Efficient and Robust General-Purpose Processing-in-Cache with XOR-Majority-Graph CCF-C In Proceedings of the 2023 on Great Lakes Symposium on VLSI (GLSVLSI’2023)
-
PIMPR: PIM-based Personalized Recommendation with Heterogeneous Memory Hierarchy CCF-B In 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE’2023)
-
Model Extraction Attacks on Split Federated Learning arXiv preprint arXiv:2303.08581
2022
-
N3H-Core: Neuron-designed Neural Network Accelerator via FPGA-based Heterogeneous Computing Cores CCF-B In Proceedings of the 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA’22)
-
HAWIS: Hardware-Aware Automated WIdth Search for Accurate, Energy-Efficient and Robust Binary Neural Network on ReRAM Dot-Product Engine CCF-C In Proceedings of 27th Asia and South Pacific Design Automation Conference (ASP-DAC’22)
-
✭Best Paper Award✭ Self-Terminating Writing of Multi-Level Cell ReRAM for Efficient Neuromorphic Computing CCF-B In Proceedings of IEEE Design, Automation and Test in Europe Conference (DATE’22)
-
ResSFL: A Resistance Transfer Framework for Defending Model Inversion Attack in Split Federated Learning CCF-A In IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR’22)
-
DTATrans: Leveraging Dynamic Token-based Quantization with Accuracy Compensation Mechanism for Efficient Transformer Architecture CCF-A IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD’22)
-
SoBS-X: Squeeze-Out Bit Sparsity for ReRAM-Crossbar-Based Neural Network Accelerator CCF-A IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD’22)
-
Cross-layer Designs against Non-ideal Effects in ReRAM-based Processing-in-Memory System In 2022 23rd International Symposium on Quality Electronic Design (ISQED’22)
-
SATO: spiking neural network acceleration via temporal-oriented dataflow and architecture CCF-A In Proceedings of the 59th ACM/IEEE Design Automation Conference (DAC’22)
-
EBSP: evolving bit sparsity patterns for hardware-friendly inference of quantized deep neural networks CCF-A In Proceedings of the 59th ACM/IEEE Design Automation Conference (DAC’22)
-
PIM-DH: ReRAM-based processing-in-memory architecture for deep hashing acceleration CCF-A In Proceedings of the 59th ACM/IEEE Design Automation Conference (DAC’22)
-
DTQAtten: Leveraging Dynamic Token-based Quantization for Efficient Attention Architecture CCF-B In (DATE-22) 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE’22)
2021
-
SME: ReRAM-based Sparse-Multiplication-Engine to Squeeze-Out Bit Sparsity of Neural Network CCF-B In IEEE International Conference on Computer Design (ICCD’21)
-
Bit-Transformer: Transforming Bit-level Sparsity into Higher Preformance in ReRAM-based Accelerator CCF-B In International Conference On Computer Aided Design (ICCAD’21)
-
AdaptiveGCN: Efficient GCN Through Adaptively Sparsifying Graphs CCF-B In Proceedings of the 30th ACM International Conference on Information & Knowledge Management (CIKM’21)
-
NeurObfuscator: A Full-stack Obfuscation Tool to Mitigate Neural Architecture Stealing In IEEE International Symposium on Hardware Oriented Security and Trust (HOST’21)
-
Improving Neural Network Efficiency via Post-training Quantization with Adaptive Floating-Point CCF-A In International Conference on Computer Vision (ICCV’21)
-
MetaGater: Fast Learning of Conditional Channel Gated Networks via Federated Meta-Learning CCF-C In IEEE 18th International Conference on Mobile Ad Hoc and Smart Systems (MASS’21)
-
Energy-Efficient Hybrid-RAM with Hybrid Bit-Serial based VMM Support CCF-C In Proceedings of Great Lakes Symposium on VLSI 2021 (GLSVLSI’21)
-
Re2PIM: A Reconfigurable ReRAM-Based PIM Design for Variable-Sized Vector-Matrix Multiplication CCF-C In Proceedings of the 2021 on Great Lakes Symposium on VLSI (GLSVLSI’21)
-
ReRAM-Sharing: Fine-Grained Weight Sharing for ReRAM-Based Deep Neural Network Accelerator CCF-B In 2021 IEEE International Symposium on Circuits and Systems (ISCAS)
-
PIMGCN: A ReRAM-based PIM Design for Graph Convolutional Network Acceleration CCF-A In Proceeding of Design Automation Conference (DAC’21)
-
Unary Coding and Variation-Aware Optimal Mapping Scheme for Reliable ReRAM-based Neuromorphic Computing CCF-A IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD)
-
Elf: Accelerate High-resolution Mobile Deep Vision with Content-aware Parallel Offloading CCF-A In 27th Annual International Conference on Mobile Computing and Networking (MobiCom’21)
-
RADAR: Run-time Adversarial Weight Attack Detection and Accuracy Recovery CCF-B In Design, Automation and Test in Europe Conference (DATE’21)
-
KSM: Fast Multiple Task Adaption via Kernel-wise Soft Mask Learning CCF-A Conference on Computer Vision and Pattern Recognition (CVPR’21)
-
T-BFA: Targeted Bit-Flip Adversarial Weight Attack CCF-A IEEE Transactions on Pattern Analysis and Machine Intelligence (TPAMI)
-
Non-Structured DNN Weight Pruning–Is It Beneficial in Any Platform? CCF-B IEEE Transactions on Neural Networks and Learning Systems (TNNLS)
2020
-
Processing-In-Memory Accelerator for Dynamic Neural Network with Run-Time Tuning of Accuracy, Power and Latency In 33rd IEEE International System-on-Chip Conference (SOCC)
-
A Progressive Sub-Network Searching Framework for Dynamic Inference arXiv preprint arXiv:2009.05681
-
2D MoS2 Based Threshold Switching Memristor For Artificial Neuron IEEE Electron Device Letters (EDL)
-
Defending and Harnessing the Bit-Flip based Adversarial Weight Attack CCF-A Conference on Computer Vision and Pattern Recognition (CVPR’20)
-
TBT: Targeted Neural Network Attack with Bit Trojan CCF-A Conference on Computer Vision and Pattern Recognition (CVPR’20)
-
Non-uniform DNN Structured Subnets Sampling for Dynamic Inference CCF-A 57th Design Automation Conference (DAC’20)
-
Defending Bit-Flip Attack through DNN Weight Reconstruction CCF-A 57th Design Automation Conference (DAC)
-
Harmonious Coexistence of Structured Weight Pruning and Ternarization for Deep Neural Networks CCF-A Thirty-third AAAI Conference on Artificial Intelligence (AAAI’20)
-
Sparse BD-Net: A Multiplication-less DNN with Sparse Binarized Depth-wise Separable Convolution CCF-C ACM Journal on Emerging Technologies in Computing Systems (JETC)
-
Hybrid Spin-CMOS Polymorphic Logic Gate With Application in In-Memory Computing IEEE Transactions on Magnetics
2019
-
Network-based multi-task learning models for biomarker selection and cancer outcome prediction CCF-A Oxford academic Bioinformatics
-
Artificial Neuron using Ag/2D-MoS 2/Au Threshold Switching Memristor In Device Research Conference (DRC)
-
Bit-Flip Attack: Crushing Neural Network with Progressive Bit Search CCF-A In International Conference on Computer Vision (ICCV’19)
-
Accelerating Deep Neural Networks in Processing-in-Memory Platforms: Analog or Digital Approach? In 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
-
Parametric Noise Injection: Trainable Randomness to Improve Deep Neural Network Robustness against Adversarial Attack CCF-A Conference on Computer Vision and Pattern (CVPR)
-
Simultaneously Optimizing Weight and Quantizer of Ternary Neural Network using Truncated Gaussian Approximation CCF-A Conference on Computer Vision and Pattern Recognition (CVPR)
-
Noise Injection Adaption: End-to-End ReRAM Crossbar Non-ideal Effect Adaption for Neural Network Mapping CCF-A 56-th Design Automation Conference (DAC)
-
Optimize Deep Convolutional Neural Network with Ternarized Weights and High Accuracy IEEE Winter Conference on Applications of Computer Vision (WACV)
-
Binarized Depthwise Separable Neural Network for Object Tracking in FPGA CCF-C Great Lakes Symposium on VLSI (GLSVLSI)
-
MRIMA: An MRAM-based In-Memory Accelerator CCF-A IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
-
ParaPIM: A Parallel Processing-In-Memory Accelerator for Binary-Weight Deep Neural Networks CCF-C In Proceedings of the 24th Asia and South Pacific Design Automation Conference (ASP-DAC)
2018
-
DIMA: A Depthwise CNN In-Memory Accelerator CCF-B In 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)
-
PIM-TGAN: A Processing-in-Memory Accelerator for Ternary Generative Adversarial Networks CCF-B In 2018 IEEE 36th International Conference on Computer Design (ICCD)
-
A Fully Onchip Binarized Convolutional Neural Network FPGA Impelmentation with Accurate Inference CCF-C In Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED)
-
Accelerating Low Bit-Width Deep Convolution Neural Network in MRAM In 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
-
✭Best Paper Award✭ BD-NET: A Multiplication-Less DNN with Binarized Depthwise Separable Convolution In 2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
-
HielM: Highly Flexible In-Memory Computing using STT MRAM CCF-C In 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC)
-
IMCE: Energy-Efficient Bit-wise In-memory Convolution Engine for Deep Neural Network CCF-C In Proceedings of the 23rd Asia and South Pacific Design Automation Conference
-
IMCS2: Novel Device-to-Architecture Co-Design for Low-Power In-Memory Computing Platform Using Coterminous Spin Switch IEEE Transactions on Magnetics
-
Leveraging Spintronic Devices for Efficient Approximate Logic and Stochastic Neural Networks CCF-C In Proceedings of the 2018 on Great Lakes Symposium on VLSI
-
Exploring A SOT-MRAM based In-Memory Computing for Data Processing IEEE Transactions on Multi-Scale Computing Systems
-
CMP-PIM: An Energy-Efficient Comparator-based Processing-in-Memory Neural Network Accelerator CCF-A In Proceedings of the 55th Annual Design Automation Conference (DAC)
-
PIMA-logic: A Novel Processing-in-Memory Architecture for Highly Flexible and Energy-Efficient Logic Computation CCF-A In Proceedings of the 55th Annual Design Automation Conference (DAC)
-
Design and Evaluation of a Spintronic In-Memory Processing Platform for Nonvolatile Data Encryption CCF-A IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (ICCAD)
2017
-
Energy Efficient Reconfigurable Threshold Logic Circuit with Spintronic Devices IEEE Transactions on Emerging Topics in Computing (TETC)
-
Current-induced Dynamics of Multiple Skyrmions with Domain-wall Pair and Skyrmion-based Majority Gate Design IEEE Magnetics Letters
-
Composite Spintronic Accuracy-configurable Adder for Low Power Digital Signal Processing In 2017 18th International Symposium on Quality Electronic Design (ISQED)
-
A Tunable Magnetic Skyrmion Neuron Cluster for Energy Efficient Artificial Neural Network CCF-B In Design, Automation & Test in Europe Conference & Exhibition (DATE)
-
Developing All-Skyrmion Spiking Neural Network Neuromorphic Computing Symposium (NCS)
-
Leveraging Dual-mode Magnetic Crossbar for Ultra-low Energy In-memory Data Encryption CCF-C In Proceedings of the on Great Lakes Symposium on VLSI 2017 (GLSVLSI)
-
Energy Efficient In-memory Computing Platform based on 4-terminal Spin Hall Effect-driven Domain Wall Motion Devices CCF-C In Proceedings of the on Great Lakes Symposium on VLSI (GLSVLSI)
-
Rimpa: A new Reconfigurable Dual-mode In-memory Processing Architecture with Spin Hall Effect-driven Domain Wall Motion Device In 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
-
✭Best Paper Award✭ Hybrid Polymorphic Logic Gate with 5-terminal Magnetic Domain Wall Motion Device In IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
-
In-memory Computing with Spintronic Devices In IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
-
Low Power In-memory Computing based on Dual-mode SOT-MRAM CCF-C In 2017 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)
-
Hybrid Polymorphic Logic Gate using 6 Terminal Magnetic Domain Wall Motion Device CCF-B In IEEE International Symposium on Circuits and Systems (ISCAS)
-
Leveraging Spintronic Devices for Ultra-low Power In-memory Computing: Logic and Neural Network In IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS)
-
High Performance and Energy-efficient In-memory Computing Architecture Based on SOT-MRAM In IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH)
-
Exploring STT-MRAM based In-memory Computing Paradigm with Application of Image Edge Extraction CCF-B In 2017 IEEE International Conference on Computer Design (ICCD)