Research Overview
ICRG studies the algorithms, software systems, architectures, circuits, and devices needed to make AI workloads efficient, reliable, and deployable. Our publications connect event-driven intelligence, data-centric memory systems, spatial AI acceleration, AI-assisted chip design, and emerging-device prototypes.
Neuromorphic learning, efficient visual perception, model efficiency, and trustworthy AI.
02Processing-in/near-memory systems, neuromorphic chips, AI accelerators, and EDA toolchains.
03ReRAM, MRAM, spintronic devices, and device-aware computing systems beyond CMOS.
Publication-Backed Programs
The directions below follow the same structure as the home page, with representative publications grouped under each program.
Spiking neural networks, brain-inspired learning theory, visual perception, and efficient intelligent systems.
Near-memory acceleration, SRAM/ReRAM-based PIM, data-centric architecture, and compiler support.
Machine-learning-assisted EDA, LLM-based Verilog generation, logic synthesis, and design automation.
Model compression, dynamic inference, adversarial robustness, privacy, and trustworthy deployment.
Post-CMOS devices, device-aware computing, neuromorphic circuits, and chip prototype validation.
Recent Signals
Representative work includes ELSA: An ELastic SNN Inference Architecture for Efficient Neuromorphic Computing, Determinism in the Undetermined: Deterministic Output in Charge-Conserving Continuous-Time Neuromorphic Systems..., and VISTREAM: Improving Computation Efficiency of Visual Perception Streaming via Law-of-Charge-Conservation....
Representative work includes NasZip: Software and Hardware Co-design to Accelerate Approximate Nearest Neighbor Search with DIMM-based..., PICK: An SRAM-based Processing-in-Memory Accelerator for K-Nearest-Neighbor Search in Point Clouds, and PolymorPIC: Embedding Polymorphic Processing-in-Cache in RISC-V based Processor for Full-stack Efficient AI....
Representative work includes HaVen: Hallucination-Mitigated LLM for Verilog Code Generation Aligned with HDL Engineers, VeriRL: Boosting the LLM-based Verilog Code Generation via Reinforcement Learning, and High-Quality Iterative Logic Compiler for In-Memory SIMD Computation with Tight Coupling of Synthesis and....
Representative work includes Splatonic: Architecture Support for 3D Gaussian Splatting SLAM via Sparse Processing, Seele: A unified acceleration framework for real-time gaussian splatting, and PICK: An SRAM-based Processing-in-Memory Accelerator for K-Nearest-Neighbor Search in Point Clouds.
Representative work includes BiNeuroRAM: Energy-Efficient ReRAM-Based PIM for Accurate Bipolar Spiking Neural Network Acceleration, Monolithic 3D integration of 2D transistors and vertical RRAMs in 1T-4R structure for high-density memory, and PIM-DH: ReRAM-based processing-in-memory architecture for deep hashing acceleration.